Green Focused Vlsi Sram Design For Minimizing Power In Ecological Monitoring Embedded Systems

Abstract

Static Random Access Memory (SRAM), as a core component of VLSI circuits, has a profound impact on the energy profile and thermal dynamics of electronic systems, both of which are critical in the context of environmental sustainability. This study presents the development of an energy-efficient 6T SRAM cell optimized not only for low-power performance but also for its potential integration into environmentally sustainable electronic infrastructures. By minimizing leakage currents and optimizing power dissipation, the proposed design directly contributes to reducing the environmental footprint of semiconductor devices deployed in large-scale computing, sensor networks, and green IoT systems. Transistor geometries were fine-tuned with W/L ratios of 2:1 and 3:1 for access transistors and 1:1 and 1.5:1 for pull-up transistors. SPICE-based simulations were performed across 32nm, 45nm, 65nm, and 90nm technology nodes under variable supply voltages (0.8V to 1.8V). Metrics such as Power Delay Product (PDP), Static Noise Margin (SNM), and dynamic/static power dissipation were evaluated with a focus on thermal efficiency and environmental impact. At 32nm, the design demonstrated superior PDP and energy conservation potential, while 90nm technology showed enhanced stability and robustness against thermal and electrical noise—relevant in environmental monitoring devices. The findings promote the use of optimized VLSI memory in low-power environmental sensing and control systems, supporting green engineering practices and sustainable electronic design.