Analysis And Optimization Of Two-Stage OTA Architectures For Power-Efficient Amplification

Abstract

This work presents the design, simulation, and performance evaluation of two-stage Operational Transconductance Amplifiers (OTAs)—specifically a single-ended and a fully differential configuration—implemented in 45nm CMOS technology for low-power applications. Emphasizing biomedical and IoT-integrated systems, the study adopts a simulation-driven methodology using Cadence Virtuoso and Spectre. Key performance parameters such as gain, bandwidth, common-mode rejection ratio (CMRR), power consumption, and offset voltage were analyzed and compared. The fully differential OTA achieved superior noise immunity and energy efficiency with a CMRR of 100 dB and power consumption of just 28 µW, while the single-ended OTA offered a slightly higher gain of 57 dB. These findings validate the suitability of the proposed designs for energy-constrained, high-precision analog front-end applications.